load testReg.hdl,
output-file testReg.out,
output-list add%B3.2.3
			din%B3.4.3
			load%B3.2.3
			dout%B3.4.3;
set add 0, 
set din 1,
set load 1;
tick,tock,
output;

set add 1, 
set din 1,
set load 1,
tick,tock,
output;