Syllabus
	Part 1

		Date	Lecture	Assign	Readings
		22-26 Jan	Digital Logic combinational and sequential logic	Problem Set 1 out	DLD* Chap 1-3 COD** App B.1 - B.3 UM*** Chap 8
		29 Jan - 2 Feb	Digital Logic Reduction Karnaugh Maps Multiplexors/Demultiplexors Adders	Problem Set 1 Due Problem Set 2 Out	DLD chap 4-6 COD app B.5 UM Chap 8
		5-9 Feb	Digital Logic: Latches and Flip-Flops Clocks Counters Memory Elements	Problem Set 2 Due Problem Set 3 Out	DLD Chap 7-8 COD app B.4, B.5
		12-16 Feb	Digital Logic: State Sequencers Finite State machines Timeing Methodologies	Problem Set 3 Due Problem Set 4 Out 16 Feb: Project 1 Out	DLD Chap 9 COD app B.6, B.7
		19-23 Feb	Performance, Instruction Sets MIPS instruction set	Problem Set 4 Due Exam 1: Tues 20 February	COD chap 1 (skim) COD chap 2 COD chap 3 (skim)

	* DLD: Digital Logic Design, Tutorials and Laboratory Exercises, John F. Passfiume and Michael Douglas, John Wiley & Sons. ** COD: Computer Organization & Design, The Hardware/Software Interface , David A. Patterson and John L. Hennessy, Morgan Kaufmann. *** UM: User Manual for LogicWorks: LogicWorks 4 Interactive Circuit Design Software. Capilano Computing Systems LTD. Addison Wesley, 1999.